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ARCS 2008 - Architecture of Computing Systems
TU Dresden » Faculty of Computer Science » ARCS 2008

Conference Program


Mon,February 25:Tutorials
Tue,February 26:Workshops + Welcome Reception
Wed,February 27:Conference Sessions + Social Event
Thu,February 28:Conference Sessions

The ARCS/FB Meeting will be held on Monday at 4pm.

Conference Program

The conference proceedings are available within the Springer LNCS series.

Tuesday, February 26, 2008

18:30   Welcome Reception with Snacks and Drinks in the Foyer of the Faculty of Computer Science

Wednesday, February 27, 2008

08:45 - 09:00  Opening (Photo)
09:00 - 10:00Keynote: Grand Challenges of Technical Computing
Theo Ungerer

10:00 - 10:30Coffee Break (Photo)
10:30 - 12:00Session 1: Hardware Design (Photo)

System Level Simulation of Autonomic SoCs with TAPES
Andreas Lankes, Thomas Wild, Johannes Zeppenfeld
(Presentation) (Photo)

Topology-Aware Replica Placement in Fault-Tolerant Embedded Networks
Thilo Streichert, Michael Glaß, Rolf Wanka, Christian Haubelt, Jürgen Teich

Design of Gate Array Circuits Using Evolutionary Algorithms
Peter Bungert, Sanaz Mostaghim, Hartmut Schmeck, Jürgen Branke

12:00 - 13:00Lunch
13:00 - 14:00Session 2: Pervasive Computing (Photo)

Direct Backtracking: An Advanced Adaptation Algorithm for Pervasive Applications
Stephan Schuhmann, Klaus Herrmann, Kurt Rothermel

Intelligent Vehicle Handling: Steering and Body Postures while Cornering
Andreas Riener, Alois Ferscha, Michael Matscheko
(Presentation) (Photo)

14:00 - 15:00Session 3: Network Processors and Memory Management

A Hardware Packet Re-Sequencer Unit for Network Processors
Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf
(Presentation) (Photo)

Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-Master Environment
Rainer Buchty, Oliver Mattes, Wolfgang Karl

15:00 - 15:30Coffee Break
15:30 - 17:00Session 4: Reconfigurable Hardware

Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks
Robert Brendle, Thilo Streichert, Dirk Koch, Christian Haubelt, Jürgen Teich

Synthesis of Multi-Dimensional High-Speed FIFOs for Out-of-Order Communication
Joachim Keinert, Christian Haubelt, Jürgen Teich

A Novel Routing Architecture for Field-Programmable Gate-Arrays
Alexander Danilin, Martijn Bennebroek, Sergei Sawitzki
(Presentation) (Photo)

Social Event:

Thursday, February 28, 2008

09:00 - 10:00   Keynote: The Impact of Operating Systems on Modern CPU Designs (and vice versa)
Chris Schläger, AMD Operating System Research Center

(Presentation) (Photo)
10:00 - 10:30Break
10:30 - 12:00Session 5: Real-time Architectures (Photo)

A Predictable Simultaneous Multithreading Scheme for Hard Real-Time
Jonathan Barre, Christine Rochange, Pascal Sainrat
(Presentation) (Photo)

Soft Real-Time Scheduling on SMT Processors with Explicit Resource Allocation
Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero

A Hardware/Software Codesign of a Co-Processor for Real-Time Hyperelliptic Curve Cryptography on a Spartan3 FPGA
Alexander Klimm, Oliver Sander, Jürgen Becker, Sylvain Subileau
(Presentation) (Photo)

12:00 - 13:00Lunch
13:00 - 14:30Session 6: Organic Computing

A Reference Architecture for Self-organizing Service-oriented Computing
Lei Liu, Stefan Thanheiser, Hartmut Schmeck

Towards Self-Organising Smart Camera Systems
Martin Hoffmann, Jörg Hähner, Christian Müller-Schloer
(Presentation) (Photo)

Using Organic Computing to Control Bunching Effects
Oliver Ribock, Urban Richter, Hartmut Schmeck

14:30 - 15:00Coffee Break
15:00 - 16:30Session 7: Computer Architecture

A Generic Network Interface Architecture for A Networked Processor Array (NePA)
Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader Bagherzadeh

Constructing Optimal XOR-Functions to Minimize Cache Conflict Misses
Hans Vandierendonck, Koen De Bosschere

Potentials of Branch Predictors —from Entropy Viewpoints—
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba


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Dear Presenters!
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Prof. Dr.-Ing. Christian Hochberger

Prof. Dr.-Ing. habil. R.G. Spallek

+49 (0)351 463 38324
Street Address
Nöthnitzer Straße 46
01187 Dresden
Mail Address
Technische Universität Dresden
Fakultät Informatik
Institut für Technische Informatik
D-01062 Dresden